![]() ![]() Therefore, within a complementary TFT circuit technology, material complexity pertains to the need of using two different semiconductors and/or dopants, together with source and drain electrode materials with different work functions ( i. Material complexity is determined by the number of materials in the device stack that need to be deposited. (16,17) Particularly low power dissipation figures can be inherently achieved through these complementary approaches, which, however, bring along considerable material, processing, and integration complexity. To date, the mainstream approaches to low-power TFT electronics involve the use of either two semiconductors with complementary majority carriers (electrons and holes) (11−15) or a single semiconductor that is n- and p-type doped. This has driven worldwide research efforts toward the development of thin-film transistor technologies in line with these voltage and power requirements. (3,4) In this context, requirements on power consumption and the use of low-complexity circuits (including circuits for power management), along with facile scalable fabrication processes, override conventional circuit performance metrics such as speed, especially for “deploy-and-forget” applications, which involve maintenance-free operation for the whole lifespan. (1,2) For example, the typical power output of an RF harvester 4 km away from a radio antenna is in the tens of microwatts, and power figures in this range are also available from compact thermoelectric harvesters. g., involving portable/remote devices powered by single-cell printed batteries, radio frequency (RF) harvesters, thin-film solar cells, and compact thermoelectric modules, which often can only provide voltages below ∼1 V and limited currents. g., organics, amorphous metal oxides, carbon nanotubes) is in high demand for many emerging applications, e. Ultralow-voltage (≤0.5 V) and ultralow-power (<1 nW/gate) thin-film transistor (TFT) electronics based on solution-processable semiconductors ( e. Among thin-film transistor technologies with minimal material complexity, our approach achieves the lowest energy and power dissipation figures reported to date, which are compatible with and highly attractive for emerging off-the-grid applications. As demonstrated with inverter and NAND gates, the ambipolar deep-subthreshold sc-SWCNTN approach enables digital circuits with complementary-like operation and characteristics including wide noise margins and ultralow operational voltages (≤0.5 V), while exhibiting record-low power consumption (≤1 pW/μm). ![]() The significance of these features is assessed by exploring the applicability of such transistors to complementary-like integrated circuits, with respect to which the impact of the subthreshold slope and flatband voltage on voltage and power requirements is studied experimentally and theoretically. Application of self-assembled monolayers at the active channel interface enables the fine-tuning of sc-SWCNTN transistors toward well-balanced ambipolar deep-subthreshold characteristics. Herein we address this challenge through the development of ambipolar transistors relying on solution-processed polymer-sorted semiconducting carbon nanotube networks (sc-SWCNTNs) operating in the deep-subthreshold regime. g., remote sensing, “place-and-forget”, and the Internet of Things. e., complementary or complementary-like) is an outstanding challenge for emerging off-the-grid applications, e. ![]() The development of ultralow-power and easy-to-fabricate electronics with potential for large-scale circuit integration ( i. ![]()
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